Presentation 2011-06-09
Development of a Singular Value Decomposition Processor Using ASIP Architecture for Large MIMO Wireless Systems
Takaya KAJI, Shingo YOSHIZAWA, Yoshikazu MIYANAGA,
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Abstract(in English) Beamforming using SVD-MIMO suppresses signal interference among antennas, and improves MIMO communication quality. In this paper, we describe a hardware design of singular value decomposition processor for SVD-MIMO systems dealing with maximum 16 transmission antennas, and report evaluation. The proposed processor based on ASIP(Application Specific Instruction-set Processor) architecture. We optimize the algorithm by determining the minimum number of QR method iterations by the simulations according to the MIMO configurations, and make efficient by using 4 floating-point units and some dedicated instructions specialized in norm computations. In the result, the circuit area was 27 kgates, the maximum clock frequency was 400 MHz, and the maximum power consumption was 17.5 mW.
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Keyword(in English) SVD-MIMO / Beamforming / Singular value decomposition / ASIP
Paper # SIS2011-10
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Conference Date 2011/6/2(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Development of a Singular Value Decomposition Processor Using ASIP Architecture for Large MIMO Wireless Systems
Sub Title (in English)
Keyword(1) SVD-MIMO
Keyword(2) Beamforming
Keyword(3) Singular value decomposition
Keyword(4) ASIP
1st Author's Name Takaya KAJI
1st Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University()
2nd Author's Name Shingo YOSHIZAWA
2nd Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University
3rd Author's Name Yoshikazu MIYANAGA
3rd Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University
Date 2011-06-09
Paper # SIS2011-10
Volume (vol) vol.111
Number (no) 78
Page pp.pp.-
#Pages 6
Date of Issue