Presentation 2011-05-12
A Virus Scanning Engine Using a 4IGU Emulator and an MPU
Hiroki NAKAHARA, Tsutomu SASAO, Munehiro MATSUURA,
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Abstract(in English) This paper shows a virus scanning system using two-stage matching. In the first stage, a hardware filter quickly detects a part of the virus pattern, while in the second stage, the MPU detects the full length of the virus pattern. To make a compact hardware filter, a finite-input memory machine (FIMM) is introduced. To further enhance the throughput, a hardware filter based on s-FIMM is used. To reduce the memory size, the s-FIMM is realized by four index generation unit emulator (4IGU emulator). The proposed system uses three DDR2-SDRAMs and a small FPGA. Thus the power consumption is lower than the TCAM-based method. Also, the system consists of inexpensive devices. The system loaded 1,290,617 C1amAV virus patterns. As for the area-throughput ratio, our method outperforms existing FPGA implementations.
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Paper # RECONF2011-10
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Committee RECONF
Conference Date 2011/5/5(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
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Title (in English) A Virus Scanning Engine Using a 4IGU Emulator and an MPU
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1st Author's Name Hiroki NAKAHARA
1st Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology()
2nd Author's Name Tsutomu SASAO
2nd Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology
3rd Author's Name Munehiro MATSUURA
3rd Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology
Date 2011-05-12
Paper # RECONF2011-10
Volume (vol) vol.111
Number (no) 31
Page pp.pp.-
#Pages 6
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