Presentation	2011-02-18 Logic stabilization of unstable logic circuit with open fault Taiki YASUTOMI, Masaru SANADA,
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Abstract(in English)	An experiment for stabilization of output logic brought by floating gate fault with unsuitable electric value has been executed. The method is the way to apply outside laser irradiation to inverter circuit with gate open fault. The experimental result indicated that output value was stabilized to "H" level, and I_ value is simultaneously changed. This valuation value corresponds to operation point in normal IN-OUT characteristics. Another experiment which Laser was irradiated to one side of two inverter circuits with common gate line showed to stabilize to the other side output value. This phenomenon is explained combining with single Transistor experiment.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	Floating gate fault / Stabilized logic value / Inverter circuit / Laser irradiation / Middle voltage
Paper #	R2010-47,EMD2010-148
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Conference Information
Committee	EMD
Conference Date	2011/2/11(1days)
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Paper Information
Registration To	Electromechanical Devices (EMD)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Logic stabilization of unstable logic circuit with open fault
Sub Title (in English)
Keyword(1)	Floating gate fault
Keyword(2)	Stabilized logic value
Keyword(3)	Inverter circuit
Keyword(4)	Laser irradiation
Keyword(5)	Middle voltage
1st Author's Name	Taiki YASUTOMI
1st Author's Affiliation	Graduate School of Engineering, Kochi University of Technology()
2nd Author's Name	Masaru SANADA
2nd Author's Affiliation	Graduate School of Engineering, Kochi University of Technology
Date	2011-02-18
Paper #	R2010-47,EMD2010-148
Volume (vol)	vol.110
Number (no)	416
Page	pp.pp.-
#Pages	6
Date of Issue