Presentation 2011-03-04
A Routing Method for Multi-layer Single Flux Quantum Circuits with Wire Ordering based on Slack Allocation
Shota TAKESHIMA, Kazuyoshi TAKAGI, Masamitsu TANAKA, Naofumi TAKAGI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) In this research, we propose a routing method with wire ordering based on timing slack allocation for SFQ circuits. In proposed method, clock nets are routed first. Next, we group clocked gates by its level and route data nets for each level. The level of a gate is the number of gates on the path from the external input to a pin of the gate. Before the data net routing, we calculate timing slacks and sort wires ordering by timing slack. Each net is routed incrementally in order of global/detailed routing. Using timing and layout information of routed nets, the wire ordering and the congestion map are updated dynamically. In the experiments, the proposed method obtained routed layouts with 44.5% fewer delay elements for timing adjustment on average compared to a conventional method.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Single Flux Quantum circuits / automated routing / layout design
Paper # VLD2010-137
Date of Issue

Conference Information
Committee VLD
Conference Date 2011/2/23(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Routing Method for Multi-layer Single Flux Quantum Circuits with Wire Ordering based on Slack Allocation
Sub Title (in English)
Keyword(1) Single Flux Quantum circuits
Keyword(2) automated routing
Keyword(3) layout design
1st Author's Name Shota TAKESHIMA
1st Author's Affiliation Graduate School of Information Scinece, Nagoya University()
2nd Author's Name Kazuyoshi TAKAGI
2nd Author's Affiliation Graduate School of Information Scinece, Nagoya University
3rd Author's Name Masamitsu TANAKA
3rd Author's Affiliation Graduate School of Information Scinece, Nagoya University
4th Author's Name Naofumi TAKAGI
4th Author's Affiliation Graduate School of Informatics, Kyoto University
Date 2011-03-04
Paper # VLD2010-137
Volume (vol) vol.110
Number (no) 432
Page pp.pp.-
#Pages 6
Date of Issue