| Presentation | 2011-03-02 An Energy-efficient ASIP Synthesis Method Using Scratchpad Memory and Code Placement Optimization Yoshinori SHIMADA, Youhua SHI, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we propose an energy-efficient ASIP synthesis method using scratchpad memory. Due to the fact that a significant amount of power is consumed in the instruction memory, how to develop energy-efficient memory structure becomes important in reducing the overall power consumption of the system. Our method is based on the idea of using scratchpad memory with code placement optimization. The proposed memory architecture can copy data from instruction memory to scratchpad meory under the control of on-chip program counter. With an inputted application CFG, the proposed code placement optimization is used to decide both the code allocations and the required scratchpad memory size for energy minimization. By doing this, the total energy consumption could be reduced as the number of instruction memory accesses is reduced. Experimental results on Mediabench are included to show the effectiveness of the proposed method, in which on average 47.9% energy consumption could be reduced. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | ASIP / energy consumption / scratchpad memory / instruction memory |
| Paper # | VLD2010-120 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2011/2/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Energy-efficient ASIP Synthesis Method Using Scratchpad Memory and Code Placement Optimization |
| Sub Title (in English) | |
| Keyword(1) | ASIP |
| Keyword(2) | energy consumption |
| Keyword(3) | scratchpad memory |
| Keyword(4) | instruction memory |
| 1st Author's Name | Yoshinori SHIMADA |
| 1st Author's Affiliation | Dept. of Conmputer Science and Engineering, Waseda University() |
| 2nd Author's Name | Youhua SHI |
| 2nd Author's Affiliation | Dept. of Conmputer Science and Engineering, Waseda University |
| 3rd Author's Name | Nozomu TOGAWA |
| 3rd Author's Affiliation | Dept. of Conmputer Science and Engineering, Waseda University |
| 4th Author's Name | Masao YANAGISAWA |
| 4th Author's Affiliation | Dept. of Conmputer Science and Engineering, Waseda University |
| 5th Author's Name | Tatsuo OHTSUKI |
| 5th Author's Affiliation | Dept. of Conmputer Science and Engineering, Waseda University |
| Date | 2011-03-02 |
| Paper # | VLD2010-120 |
| Volume (vol) | vol.110 |
| Number (no) | 432 |
| Page | pp.pp.- |
| #Pages | 6 |
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