Presentation 2011-02-07
A highly reliable Cu interconnects with CuSiN and Ti-based barrier metal : Impact of oxygen surface treatment
Yumi HAYASHI, Noriaki MATSUNAGA, Makoto WADA, Shinichi NAKAO, Kei WATANABE, Satoshi KATO, Atsuko SAKATA, Akihiro KAJITA, Hideki SHIBATA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A trade-off property of CuSiN between EM improvement and line resistance increase was resolved by a breakthrough that leaves oxygen at grain boundary of Cu line surface before CuSiN formation. Then, the combination of CuSiN and Ti-rich TiN (Ti(N)) barrier metal (-BM) was applied. Oxygen left by weakening process strength of CuO_x reduction lowered line resistance, because Si diffusion causing line resistance increase was controlled by the oxygen at grain boundary. Low-damage process of CuO_x reduction also improved voltage ramp dielectric breakdown (VRDB) property. Excellent EM performance brought about by CuSiN was kept by the combination with Ti(N)-BM, because the oxygen made Si and Ti distributions uniform at grain boundary of Cu surface by forming Ti-silicide. Cu atom transport that caused EM failure was suppressed throughout grain boundary of Cu surface.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) CuSiN / Ti-based barrier / Cu interconnect / Electromigration / oxygen / CuO_x reduction
Paper # SDM2010-219
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Conference Information
Committee SDM
Conference Date 2011/1/31(1days)
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Paper Information
Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A highly reliable Cu interconnects with CuSiN and Ti-based barrier metal : Impact of oxygen surface treatment
Sub Title (in English)
Keyword(1) CuSiN
Keyword(2) Ti-based barrier
Keyword(3) Cu interconnect
Keyword(4) Electromigration
Keyword(5) oxygen
Keyword(6) CuO_x reduction
1st Author's Name Yumi HAYASHI
1st Author's Affiliation Device Process Development Center, Corporate Research and Development Center, Toshiba Corporation()
2nd Author's Name Noriaki MATSUNAGA
2nd Author's Affiliation Semiconductor Company, Toshiba Corporation
3rd Author's Name Makoto WADA
3rd Author's Affiliation Device Process Development Center, Corporate Research and Development Center, Toshiba Corporation
4th Author's Name Shinichi NAKAO
4th Author's Affiliation Device Process Development Center, Corporate Research and Development Center, Toshiba Corporation
5th Author's Name Kei WATANABE
5th Author's Affiliation Device Process Development Center, Corporate Research and Development Center, Toshiba Corporation
6th Author's Name Satoshi KATO
6th Author's Affiliation Semiconductor Company, Toshiba Corporation
7th Author's Name Atsuko SAKATA
7th Author's Affiliation Device Process Development Center, Corporate Research and Development Center, Toshiba Corporation
8th Author's Name Akihiro KAJITA
8th Author's Affiliation Device Process Development Center, Corporate Research and Development Center, Toshiba Corporation
9th Author's Name Hideki SHIBATA
9th Author's Affiliation Device Process Development Center, Corporate Research and Development Center, Toshiba Corporation
Date 2011-02-07
Paper # SDM2010-219
Volume (vol) vol.110
Number (no) 408
Page pp.pp.-
#Pages 5
Date of Issue