| Presentation | 2011-04-12 An Approach and Evaluation of Fault Tolerant Sequential Circuits for Simultaneous Occurrence of Multiple Transient Faults Satoshi FUKUMOTO, Kenta IMAI, Hideo KOHINATA, Masayuki ARAI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper discusses the extension of highly reliable technique for sequential circuits using duplicate register which has been already presented by author's research group. A new approach by triplicate register enables the circuit to recover even in the case that simultaneous occurrence of multiple transient faults continues for 2 clock cycles. The concrete microprocessor for applying this technique is constructed to exhibit actually enhanced dependability. Overhead on circuit area is estimated and the fault tolerance under our assumptions is confirmed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | transient fault / highly reliable sequential circuit / simultaneous multiple faults |
| Paper # | CPSY2011-1,DC2011-1 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2011/4/5(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Approach and Evaluation of Fault Tolerant Sequential Circuits for Simultaneous Occurrence of Multiple Transient Faults |
| Sub Title (in English) | |
| Keyword(1) | transient fault |
| Keyword(2) | highly reliable sequential circuit |
| Keyword(3) | simultaneous multiple faults |
| 1st Author's Name | Satoshi FUKUMOTO |
| 1st Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University() |
| 2nd Author's Name | Kenta IMAI |
| 2nd Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University |
| 3rd Author's Name | Hideo KOHINATA |
| 3rd Author's Affiliation | Graduate School of System Design, Tokyo Metropolitan University |
| 4th Author's Name | Masayuki ARAI |
| 4th Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University |
| Date | 2011-04-12 |
| Paper # | CPSY2011-1,DC2011-1 |
| Volume (vol) | vol.111 |
| Number (no) | 2 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |