Presentation 2011-03-18
Modeling of Timing Faults and Test Generation for Single Flux Quantum Logic Circuits
Nobutaka KITO, Kazuyoshi TAKAGI, Naofumi TAKAGI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Single Flux Quqntum(SFQ) logic circuits are expected to achieve ultra-high-performance computers with low power. For realizing SFQ high-performance computers, fundamental technologies of SFQ super computers have been studied intensively. This report discusses fault modeling and test generation for SFQ logic circuits. SFQ circuits are very fast and use special logic system (pulse logic). Therefore, SFQ specific faults different from faults of CMOS logic circuits exists such as misalignment of data arrival clock cycle at gate inputs. In this report, a fault model for SFQ circuits and a test generation method with respect to the fault model are shown. In test generation, SFQ circuits are classified according to circuit structure of reconvergence. Two types of SFQ circuits are shown. For each type, test generation method is proposed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Single flux quantum circuit / SFQ circuit / testing / timing fault
Paper # CPSY2010-74,DC2010-73
Date of Issue

Conference Information
Committee DC
Conference Date 2011/3/11(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Modeling of Timing Faults and Test Generation for Single Flux Quantum Logic Circuits
Sub Title (in English)
Keyword(1) Single flux quantum circuit
Keyword(2) SFQ circuit
Keyword(3) testing
Keyword(4) timing fault
1st Author's Name Nobutaka KITO
1st Author's Affiliation Graduate School of Informatics, Kyoto University()
2nd Author's Name Kazuyoshi TAKAGI
2nd Author's Affiliation Graduate School of Information Science, Nagoya University
3rd Author's Name Naofumi TAKAGI
3rd Author's Affiliation Graduate School of Informatics, Kyoto University
Date 2011-03-18
Paper # CPSY2010-74,DC2010-73
Volume (vol) vol.110
Number (no) 474
Page pp.pp.-
#Pages 6
Date of Issue