Presentation 2011-03-18
Development of a Network Recorder for High-Speed Real-Time Data Acquisition and Packet Capture
Kenji TODA, Mamoru SEKIYAMA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A FPGA based network traffic recorder, which is capable of loss-less packet capture of one 1OGbE per FPGA board, has developed. Utilizing higher speed SSDs, SSD RAID systems, and sets of multiple boards, it is reachable to perform at the speed of several tens of Gbps. The recorder can be used for real-time data acquisition of large scale physics experiments having high-bandwidth data. The recorder is also expected to be used with information filtering, data base search, or other application logic on the FPGA board.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Network Traffic Recorder / Real-Time Data Acquisition / FPGA / Hash / Binary Search / 10G bit Ethernet / SSD / Raid / Information Filtering
Paper # CPSY2010-73,DC2010-72
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Committee DC
Conference Date 2011/3/11(1days)
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Paper Information
Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Development of a Network Recorder for High-Speed Real-Time Data Acquisition and Packet Capture
Sub Title (in English)
Keyword(1) Network Traffic Recorder
Keyword(2) Real-Time Data Acquisition
Keyword(3) FPGA
Keyword(4) Hash
Keyword(5) Binary Search
Keyword(6) 10G bit Ethernet
Keyword(7) SSD
Keyword(8) Raid
Keyword(9) Information Filtering
1st Author's Name Kenji TODA
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)()
2nd Author's Name Mamoru SEKIYAMA
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
Date 2011-03-18
Paper # CPSY2010-73,DC2010-72
Volume (vol) vol.110
Number (no) 474
Page pp.pp.-
#Pages 6
Date of Issue