| Presentation | 2011-02-18 Design and demonstration of a 5-bit flash-type SFQ A/D converter with error correction circuits Hideo Suzuki, Makoto Oikawa, Kenichiro Nishii, Kazumasa Ishihara, Mutsuo Hidaka, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have been developing a flash-type analog-to-digital (A/D) converter with superconducting SFQ circuits. The critical density of the Josephson junctions, j_c, was increased to 10kA/cm from 2.5kA/cm^2, which would be improved the high-frequency responses of the circuits. We have designed 5-bit flash-type SFQ analog^2-to-digital (A/D) converters which include eight comparators, a look-back error correction circuit and an interleaving circuit. Then, we have confirmed the correct operations of the integrated circuit at low frequency. We have also designed a 4-bit comparator circuit and carried out the high-frequency measurements with two approaches. One is a beat-frequency method in which both of input and sampling clock signals are almost same high-frequencies but differ by a beat frequency of 1 kHz. We have obtained 3 bits in binary code operation and 4 bits in gray code operation at an input frequency of 1 5GHz. As a preliminary result, response corresponding to 4 bits in binary code at an input frequency of 13 GHz was obtained with a single comparator which used a downsized transformer. Another measurement is a high sampling clock frequency operation with a low frequency input signal. We have confirmed the improved operations of high-clock frequencies over 50GHz with a j_c of 10 kA/cm from 32 GHz with a j_c of 2.5kA/cm^2. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SFQ circuit / Superconductor / A/D converter |
| Paper # | IA2010-83 |
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| Conference Information | |
| Committee | IA |
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| Conference Date | 2011/2/11(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Internet Architecture(IA) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design and demonstration of a 5-bit flash-type SFQ A/D converter with error correction circuits |
| Sub Title (in English) | |
| Keyword(1) | SFQ circuit |
| Keyword(2) | Superconductor |
| Keyword(3) | A/D converter |
| 1st Author's Name | Hideo Suzuki |
| 1st Author's Affiliation | International superconductivity Technology Center() |
| 2nd Author's Name | Makoto Oikawa |
| 2nd Author's Affiliation | International superconductivity Technology Center |
| 3rd Author's Name | Kenichiro Nishii |
| 3rd Author's Affiliation | International superconductivity Technology Center |
| 4th Author's Name | Kazumasa Ishihara |
| 4th Author's Affiliation | International superconductivity Technology Center:Tokyo Denki University |
| 5th Author's Name | Mutsuo Hidaka |
| 5th Author's Affiliation | International superconductivity Technology Center |
| Date | 2011-02-18 |
| Paper # | IA2010-83 |
| Volume (vol) | vol.110 |
| Number (no) | 417 |
| Page | pp.pp.- |
| #Pages | 4 |
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