Presentation 2011-01-28
Monolithically Integrated 1x100 Photonic Switch Based on Reconfigurable Phased Arrays and SOAs
Ibrahim Murat Soganci, Takuo Tanemura, Koji Takeda, Masaru Zaitsu, Mitsuru Takenaka, Yoshiaki Nakano,
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Abstract(in English) An InP photonic integrated circuit with 1x100 electro-optical switching functionality is reported. The photonic circuit consists of a two-stage cascade of phased-array switches integrated with an array of semiconductor optical amplifiers (SOAs) at the output. 135 phase shifters, 100 SOAs and 22 star couplers interconnected with hundreds of passive waveguides are monolithically integrated using the offset quantum well technique. The switch demonstrates a power penalty below 1 dB at 10 Gbps and an extinction ratio above 50 dB.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Photonic integrated circuits / Optical switches / Phased arrays / Optical Communications
Paper # PN2010-42,OPE2010-155,LQE2010-140
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Conference Information
Committee LQE
Conference Date 2011/1/20(1days)
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Registration To Lasers and Quantum Electronics (LQE)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Monolithically Integrated 1x100 Photonic Switch Based on Reconfigurable Phased Arrays and SOAs
Sub Title (in English)
Keyword(1) Photonic integrated circuits
Keyword(2) Optical switches
Keyword(3) Phased arrays
Keyword(4) Optical Communications
1st Author's Name Ibrahim Murat Soganci
1st Author's Affiliation Research Center for Advanced Science and Technology, The University of Tokyo()
2nd Author's Name Takuo Tanemura
2nd Author's Affiliation Research Center for Advanced Science and Technology, The University of Tokyo
3rd Author's Name Koji Takeda
3rd Author's Affiliation Research Center for Advanced Science and Technology, The University of Tokyo
4th Author's Name Masaru Zaitsu
4th Author's Affiliation Research Center for Advanced Science and Technology, The University of Tokyo
5th Author's Name Mitsuru Takenaka
5th Author's Affiliation Department of Electrical Engineering and Information Systems, The University of Tokyo
6th Author's Name Yoshiaki Nakano
6th Author's Affiliation Research Center for Advanced Science and Technology, The University of Tokyo
Date 2011-01-28
Paper # PN2010-42,OPE2010-155,LQE2010-140
Volume (vol) vol.110
Number (no) 396
Page pp.pp.-
#Pages 5
Date of Issue