Presentation | 2011-01-24 Design of Dynamically Reconfigurable Pulse Logic Circuit Keiichi NAGAI, Yusaku YAMAZAKI, Masatoshi SEKINE, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We propose that use closed ioop circuit not memory to storage pulse signal sequences. As a design rule of the closed ioop circuit, the Lie algebra which is the general theory of groups is used. The minimum unit of the closed loop called a basic closed circuit is the smallest storage element in pulse logic. In this paper, the larger closed loop circuit is designed by the combination of basic closed ioop circuits. Having the wire connection state between basic closed ioop circuits is able to change the scale of the closed ioop circuit and the state of pulse in this loop voluntarily. We discuss the use of the closed ioop circuit. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Pulse Logic / Neural Net / Lie Algebra / Closed Loop |
Paper # | NLP2010-129,NC2010-93 |
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Committee | NC |
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Conference Date | 2011/1/17(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Neurocomputing (NC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Design of Dynamically Reconfigurable Pulse Logic Circuit |
Sub Title (in English) | |
Keyword(1) | Pulse Logic |
Keyword(2) | Neural Net |
Keyword(3) | Lie Algebra |
Keyword(4) | Closed Loop |
1st Author's Name | Keiichi NAGAI |
1st Author's Affiliation | Faculty of Engineering, Tokyo University of Agriculture and Technology() |
2nd Author's Name | Yusaku YAMAZAKI |
2nd Author's Affiliation | Faculty of Engineering, Tokyo University of Agriculture and Technology |
3rd Author's Name | Masatoshi SEKINE |
3rd Author's Affiliation | Faculty of Engineering, Tokyo University of Agriculture and Technology |
Date | 2011-01-24 |
Paper # | NLP2010-129,NC2010-93 |
Volume (vol) | vol.110 |
Number (no) | 388 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |