Presentation 2010-12-17
A 1-V Input, 0.2-V to 0.47-V Output Switched-Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction
Xin ZHANG, Yu PU, Koichi ISHIDA, Yoshikatsu RYU, Yasuyuki OKUMA, Po-Hong CHEW, Kazunori WATANABE, Takayasu SAKURAI, Makoto TAKAMIYA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) To effectively reduce output ripple of switched-capacitor DC-DC converters which generate variable output voltages, a novel feedback control scheme is presented. The proposed scheme uses pulse density and width modulation (PDWM) to reduce the output ripple with low output voltage. The prototype chip was implemented using 65nm CMOS process. The switched-capacitor DC-DC converter has 0.2-V to 0.47-V output voltage and delivers 0.25-mA to 10-mA output current from a 1-V input supply with a peak efficiency of 87%. Compared with the conventional pulse density modulation (PDM), the proposed switched-capacitor DC-DC converter with PDWM reduces the output ripple by 57% in the low output voltage region with the efficiency penalty of 2%.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) DC-DC converter / Low ripple / Low voltage / Pulse density modulation / Pulse width modulation / Switched-capacitor
Paper # ICD2010-127
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Committee ICD
Conference Date 2010/12/9(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A 1-V Input, 0.2-V to 0.47-V Output Switched-Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction
Sub Title (in English)
Keyword(1) DC-DC converter
Keyword(2) Low ripple
Keyword(3) Low voltage
Keyword(4) Pulse density modulation
Keyword(5) Pulse width modulation
Keyword(6) Switched-capacitor
1st Author's Name Xin ZHANG
1st Author's Affiliation The University of Tokyo()
2nd Author's Name Yu PU
2nd Author's Affiliation The University of Tokyo
3rd Author's Name Koichi ISHIDA
3rd Author's Affiliation The University of Tokyo
4th Author's Name Yoshikatsu RYU
4th Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
5th Author's Name Yasuyuki OKUMA
5th Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
6th Author's Name Po-Hong CHEW
6th Author's Affiliation The University of Tokyo
7th Author's Name Kazunori WATANABE
7th Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
8th Author's Name Takayasu SAKURAI
8th Author's Affiliation The University of Tokyo
9th Author's Name Makoto TAKAMIYA
9th Author's Affiliation The University of Tokyo
Date 2010-12-17
Paper # ICD2010-127
Volume (vol) vol.110
Number (no) 344
Page pp.pp.-
#Pages 5
Date of Issue