Presentation | 2010-12-16 Design of An FU Network for Array Accelerators(Poster Presentation) Suguru OOUE, Takuya IWAKAMI, Kazuhiro YOSHIMURA, Takashi NAKADA, Yasuhiko NAKASHIMA, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We have proposed Linear Array Pipeline Processor (LAPP) as a special implementation of Function Unit (FU) array based accelerator. Its VLIW processor as the front-end part and the unmapped FU can be power-gated to ensure an energy-efficiency design, running well mapped conventional VLIW instructions. In this poster, we will introduce an FU network design for LAPP, which traces register numbers appearing in mapped instructions and then propagates minimum necessary register values to successive array stages. According to an HDL implementation, the delay time of the selector is 5.74 F04. The result shows that the selectors will not extend any critical path in LAPP. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | array execution units / VLIW / FU Network / instruction mapping / reconfigurable architecture |
Paper # | ICD2010-115 |
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Conference Information | |
Committee | ICD |
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Conference Date | 2010/12/9(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Design of An FU Network for Array Accelerators(Poster Presentation) |
Sub Title (in English) | |
Keyword(1) | array execution units |
Keyword(2) | VLIW |
Keyword(3) | FU Network |
Keyword(4) | instruction mapping |
Keyword(5) | reconfigurable architecture |
1st Author's Name | Suguru OOUE |
1st Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology() |
2nd Author's Name | Takuya IWAKAMI |
2nd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
3rd Author's Name | Kazuhiro YOSHIMURA |
3rd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
4th Author's Name | Takashi NAKADA |
4th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
5th Author's Name | Yasuhiko NAKASHIMA |
5th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
Date | 2010-12-16 |
Paper # | ICD2010-115 |
Volume (vol) | vol.110 |
Number (no) | 344 |
Page | pp.pp.- |
#Pages | 3 |
Date of Issue |