Presentation 2010-12-16
A 0.5V Subthreshold CMOS Analog Amplifier with Sub-MHz Bandwidth
Takashi MORI, Tomochika HARADA, Koichi MATSUSHITA, Sumio OKUYAMA,
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Abstract(in English) In this paper, we present an ultra-low voltage analog amplifier based on a folded cascode opamp using subthreshold operation. Using Rail-to-Rail operation, this circuit consists of n-type and p-type differential pair at input and cascade gain stage at output. We design and evaluate it by 0.18 μm CMOS process. As a result, bandwidth is 200 to 400 kHz @ 0.5V and power consumption is 16.35nW @ 0.5V. Thus, proposed circuit can be achieved 10-100 times faster operation than ultra-low power 2-stage opamp which is already designed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) subthreshold current / Rail-to-Rail / ultra-low voltage operation / bandwidth
Paper # ICD2010-103
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Committee ICD
Conference Date 2010/12/9(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A 0.5V Subthreshold CMOS Analog Amplifier with Sub-MHz Bandwidth
Sub Title (in English)
Keyword(1) subthreshold current
Keyword(2) Rail-to-Rail
Keyword(3) ultra-low voltage operation
Keyword(4) bandwidth
1st Author's Name Takashi MORI
1st Author's Affiliation Graduate School of Science and Engineering, Yamagata University()
2nd Author's Name Tomochika HARADA
2nd Author's Affiliation Graduate School of Science and Engineering, Yamagata University
3rd Author's Name Koichi MATSUSHITA
3rd Author's Affiliation Graduate School of Science and Engineering, Yamagata University
4th Author's Name Sumio OKUYAMA
4th Author's Affiliation Graduate School of Science and Engineering, Yamagata University
Date 2010-12-16
Paper # ICD2010-103
Volume (vol) vol.110
Number (no) 344
Page pp.pp.-
#Pages 5
Date of Issue