Presentation	2010-12-16 Measurement and Characteristics Validation of On-chip Signal and Power Noise : Looking back on my doctral course (Invited talk) Yasuhiro OGASAHARA,
PDF Download Page	PDF download Page Link
Abstract(in Japanese)	(See Japanese page)
Abstract(in English)	This paper describes measurement results of inductive coupling effect on timing, and validation of interconnect model. The impact of capacitive and inductive crosstalk in prospective processes are quantitatively predicted using the validated model. This paper also measure power supply noise, and verifies a current model with capacitance and variable resistor and gate delay dependency on average voltage drop. All digital measurement circuit for power supply noise is proposed for observation of the characteristics of decoupling capacitance.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	crosstalk noise / power supply noise / on-chip measurement
Paper #	ICD2010-98
Date of Issue

Conference Information
Committee	ICD
Conference Date	2010/12/9(1days)
Place (in Japanese)	(See Japanese page)
Place (in English)
Topics (in Japanese)	(See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To	Integrated Circuits and Devices (ICD)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Measurement and Characteristics Validation of On-chip Signal and Power Noise : Looking back on my doctral course (Invited talk)
Sub Title (in English)
Keyword(1)	crosstalk noise
Keyword(2)	power supply noise
Keyword(3)	on-chip measurement
1st Author's Name	Yasuhiro OGASAHARA
1st Author's Affiliation	Renesas Electronics Corporation()
Date	2010-12-16
Paper #	ICD2010-98
Volume (vol)	vol.110
Number (no)	344
Page	pp.pp.-
#Pages	6
Date of Issue