Presentation 2010-12-10
A class of 1 level error correcting code for multilevel cell flash memories
Kazuya SATO, Masato KITAKAMI,
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Abstract(in English) Flash memories are used in many ways, because of the features of fast random access speed, power consumption, and resistance to physical shocks. In recent years, multilevel cell (MLC) flash memories that store multiple data bits in a memory cell are introduced for the high density integration. In MLC flash memories, the level of charge is apt to change to neighboring level by charge fluctuations. Especially, 1 level fluctuations are apt to occur extremely frequently. This paper proposes 1 level error correcting code suitable for MLC flash memories in order to control errors efficiently. The proposed method utilizes an asymmetric error locating code and a mapping derived from Gray codes. Evaluation shows that the code length of the proposed code is larger than that of conventional codes.
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Keyword(in English) flash memory / multilevel cell / asymmetric error / Gray code
Paper # DC2010-53
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Committee DC
Conference Date 2010/12/3(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A class of 1 level error correcting code for multilevel cell flash memories
Sub Title (in English)
Keyword(1) flash memory
Keyword(2) multilevel cell
Keyword(3) asymmetric error
Keyword(4) Gray code
1st Author's Name Kazuya SATO
1st Author's Affiliation Graduate School of Advanced Integration Science, Chiba University()
2nd Author's Name Masato KITAKAMI
2nd Author's Affiliation Graduate School of Advanced Integration Science, Chiba University
Date 2010-12-10
Paper # DC2010-53
Volume (vol) vol.110
Number (no) 333
Page pp.pp.-
#Pages 6
Date of Issue