Presentation 2011-01-17
UMLアクティビティ図のハードウェア記述言語NSLへの動作合成(コンピュータシステム,FPGA応用及び一般)
Toshihiro KAMIKAGE, Ryota YAMAZAKI, Naohiko SHIMIZU,
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Abstract(in English) In this paper, we will present a set of tools which synthesize the hardware from UML diagrams. In our previous work, We developed a new high level system description language NSL, an NSL language processor, and a UML class diagram synthesizer 'UML2NSL'. A UML class diagram shows the structure of a system. But, it can not show the behavior. In this paper, we will present a UML activity diagram synthesizer that converts the behavior to NSL. We also show the rules of UML activity diagram for synthesis. We can make FPGAs Logic with the synthesized NSL description with our tools.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) UML / NSL / UML Activity Diagram / UML Class Diagram
Paper # VLD2010-84,CPSY2010-39,RECONF2010-53
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Committee RECONF
Conference Date 2011/1/10(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English)
Sub Title (in English)
Keyword(1) UML
Keyword(2) NSL
Keyword(3) UML Activity Diagram
Keyword(4) UML Class Diagram
1st Author's Name Toshihiro KAMIKAGE
1st Author's Affiliation Tokai University()
2nd Author's Name Ryota YAMAZAKI
2nd Author's Affiliation Tokai University
3rd Author's Name Naohiko SHIMIZU
3rd Author's Affiliation Tokai University:IP ARCH, Inc.
Date 2011-01-17
Paper # VLD2010-84,CPSY2010-39,RECONF2010-53
Volume (vol) vol.110
Number (no) 362
Page pp.pp.-
#Pages 6
Date of Issue