| Presentation | 2010-11-30 Improvement and Evaluation of via programmable structured ASIC VPEX Ryouhei Hori, Tatsuya Kitamori, Taisuke Ueoka, Masaya Yosikawa, Takeshi Fujino, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The Via Programmable Structured ASIC (VPSA), has been studied in order to reduce the NRE cost including photo-mask cost. We have been developed VPEX architecture which can be customized by two via layers (via-1 and third via-3). Until now, we had demonstrated that VPEX shows smaller AD(Area and Delay) product, and 50% less power compared to other VPSA architectures using LUT or SOP as a Logic element(LE). However, the circuit area of VPEX is four times as large as that of standard cell base ASIC. In this paper, we propose an improved VPEX architecture which can be customized by three via layers (via-1,2,3). The flexibility of LE layout can be increased by adding via-2 as a programmable layer, hence, the LE area is reduced to about 40% and the number of configurable logic functions is increased. The area penalty of logic area configured by new VPEX architecture is about two times as large as that of standard cell base ASIC, after the area evaluation results using some benchmark circuits. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | structured ASIC / Via Programmable / Exclusive-OR |
| Paper # | CPM2010-132,ICD2010-91 |
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| Conference Information | |
| Committee | CPM |
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| Conference Date | 2010/11/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Component Parts and Materials (CPM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Improvement and Evaluation of via programmable structured ASIC VPEX |
| Sub Title (in English) | |
| Keyword(1) | structured ASIC |
| Keyword(2) | Via Programmable |
| Keyword(3) | Exclusive-OR |
| 1st Author's Name | Ryouhei Hori |
| 1st Author's Affiliation | Graduate school of Science Engineering, Ritsumeikan University() |
| 2nd Author's Name | Tatsuya Kitamori |
| 2nd Author's Affiliation | Graduate school of Science Engineering, Ritsumeikan University |
| 3rd Author's Name | Taisuke Ueoka |
| 3rd Author's Affiliation | Faculty of Science and Engineering, Ritsumeikan University |
| 4th Author's Name | Masaya Yosikawa |
| 4th Author's Affiliation | Faculty of Science and Engineering, Meijou University |
| 5th Author's Name | Takeshi Fujino |
| 5th Author's Affiliation | Faculty of Science and Engineering, Ritsumeikan University |
| Date | 2010-11-30 |
| Paper # | CPM2010-132,ICD2010-91 |
| Volume (vol) | vol.110 |
| Number (no) | 314 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |