Presentation 2010-12-01
Analysis of Channel Decomposition for Structured Analog Layout and Low-power Applications
Bo YANG, Qing DONG, Jing LI, Shigetoshi NAKATAKE,
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Abstract(in English) This paper addresses the problem of transistor decomposition in channel length direction, which is important to structured analog layout and low-power design. We analyze the theoretical error arising from the decomposition in both large signal model and small signal model, and the theoretical results then are compared with the measurement data from a test chip. We confirm that the transistor decomposition in channel length direction is applicable, and that the compact model can support the design with channel decomposition as long as ΔV_ is ignored.
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Keyword(in English) Transistor Decomposition / Channel Decomposition / Structured Analog Layout
Paper # VLD2010-79,DC2010-46
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Committee DC
Conference Date 2010/11/22(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Analysis of Channel Decomposition for Structured Analog Layout and Low-power Applications
Sub Title (in English)
Keyword(1) Transistor Decomposition
Keyword(2) Channel Decomposition
Keyword(3) Structured Analog Layout
1st Author's Name Bo YANG
1st Author's Affiliation Department of Information and Media Engineering, The University of Kitakyushu()
2nd Author's Name Qing DONG
2nd Author's Affiliation Department of Information and Media Engineering, The University of Kitakyushu
3rd Author's Name Jing LI
3rd Author's Affiliation Department of Information and Media Engineering, The University of Kitakyushu
4th Author's Name Shigetoshi NAKATAKE
4th Author's Affiliation Department of Information and Media Engineering, The University of Kitakyushu
Date 2010-12-01
Paper # VLD2010-79,DC2010-46
Volume (vol) vol.110
Number (no) 317
Page pp.pp.-
#Pages 6
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