Presentation 2010-11-30
Evaluation of FPGA Implementation Techniques for High-Performance So Prototypes
Hideo TANIDA, Hiroaki YOSHIDA, Masahiro FUJITA,
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Abstract(in English) With the increasing scale and shrinking time-to-market of SoC systems, prototype implementations of SoCs on FPGAs are commonly performed during development cycles. Also, efficient interconnect technologies such as Network-on-Chip (NoC) are expected to be called for in future SoC systems. Therefore, in this paper, we perform a study of interconnect technologies applicable to FPGA-based implementations of high-performance SoC prototypes, which is followed by evaluations of them. We have chosen CoreConnect PLB, Fast Simplex Link, AMBA AXI4-Stream as the evaluation targets. Measures used in the evaluation are transfer time, resource usage of the interconnects, power and energy consumed to complete operations.
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Keyword(in English) SoC / prototyping / FPGA / interconnect
Paper # VLD2010-68,DC2010-35
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Committee DC
Conference Date 2010/11/22(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Evaluation of FPGA Implementation Techniques for High-Performance So Prototypes
Sub Title (in English)
Keyword(1) SoC
Keyword(2) prototyping
Keyword(3) FPGA
Keyword(4) interconnect
1st Author's Name Hideo TANIDA
1st Author's Affiliation Dept. of Electrical Engineering and Information Systems, The University of Tokyo()
2nd Author's Name Hiroaki YOSHIDA
2nd Author's Affiliation VLSI Design and Education Center, The University of Tokyo:CREST, Japan Science and Technology Agency
3rd Author's Name Masahiro FUJITA
3rd Author's Affiliation VLSI Design and Education Center, The University of Tokyo:CREST, Japan Science and Technology Agency
Date 2010-11-30
Paper # VLD2010-68,DC2010-35
Volume (vol) vol.110
Number (no) 317
Page pp.pp.-
#Pages 6
Date of Issue