| Presentation | 2010-10-22 Investigation of accelerating FDTD microwave solver by using GPGPU Nagayoshi MORITA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The author investigates the problems of accelerating FDTD MIC elements analysis simulator solver by using GPGPU. Presently, the attained speed is yet almost the same as that using a conventional CPU only. In this stage, I would like to present, by taking a step-impedance low pass filter as an example, the outline of analysis algorithm used in this study and make clear the difficult points involved in using GPGPU. Required means hereafter to achieve real accelerated operation are also mentioned. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | GPGPU / FDTD / MIC analysis solver |
| Paper # | EMCJ2010-61,MW2010-96 |
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| Conference Information | |
| Committee | EMCJ |
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| Conference Date | 2010/10/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Electromagnetic Compatibility (EMCJ) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Investigation of accelerating FDTD microwave solver by using GPGPU |
| Sub Title (in English) | |
| Keyword(1) | GPGPU |
| Keyword(2) | FDTD |
| Keyword(3) | MIC analysis solver |
| 1st Author's Name | Nagayoshi MORITA |
| 1st Author's Affiliation | Faculty of Engineering, Chiba Institute of Technology() |
| Date | 2010-10-22 |
| Paper # | EMCJ2010-61,MW2010-96 |
| Volume (vol) | vol.110 |
| Number (no) | 236 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |