Presentation | 2010-08-27 Four-point template matching operations on a dynamically reconfigurable vision-chip architecture Hironari NAKADA, Minoru WATANABE, |
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Abstract(in English) | In recent years, development of a high-speed image processing system is required for autonomous robots and cars, and so on. Since such embedded system must execute image processing operations at 1000 frames/s, there are issues in transferring image information and processing it. Up to now, some vision chips including processing elements have been developed. However, such vision chip can execute only simple operations and its performance is insufficient. Therefore, we have been developing a dynamically reconfigurable image processing device. This paper presents the experimental results of 4-point template matching operations on a dynamically reconfigurable image processor architecture. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Optically Reconfigurable Gate Arrays (ORGAs) / Holographic memory / Dynamic reconfiguration / Image sensor |
Paper # | EMD2010-57,CPM2010-73,OPE2010-82,LQE2010-55 |
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Committee | EMD |
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Conference Date | 2010/8/19(1days) |
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Registration To | Electromechanical Devices (EMD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Four-point template matching operations on a dynamically reconfigurable vision-chip architecture |
Sub Title (in English) | |
Keyword(1) | Optically Reconfigurable Gate Arrays (ORGAs) |
Keyword(2) | Holographic memory |
Keyword(3) | Dynamic reconfiguration |
Keyword(4) | Image sensor |
1st Author's Name | Hironari NAKADA |
1st Author's Affiliation | Faculty of Engineering, Shizuoka University() |
2nd Author's Name | Minoru WATANABE |
2nd Author's Affiliation | Faculty of Engineering, Shizuoka University |
Date | 2010-08-27 |
Paper # | EMD2010-57,CPM2010-73,OPE2010-82,LQE2010-55 |
Volume (vol) | vol.110 |
Number (no) | 178 |
Page | pp.pp.- |
#Pages | 4 |
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