Presentation 2010-08-05
Reachability Analysis for Timed Systems using Parallel Processing
Toshiaki TANAKA, Takeshi NAGAOKA, Kozo OKANO, Shinji KUSUMOTO,
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Abstract(in English) This report proposes efficient parallel processing of reachability analysis for timed automaton. Our research group has already proposed CEGAR loop for timed automaton. The report proposes parallel processing version of the CEGAR loop. The new version performs in parallel model checking with different parameters and the master mode synthesizes multiple counter examples generated by workers and refines the model. We have prototyped a tool and performed experiments. We found that some of the results show the efficiency of the proposed parallel processing.
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Keyword(in English) Timed Automaton / Model Checking / CEGAR / Parallel Processing
Paper # SS2010-22
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Committee SS
Conference Date 2010/7/29(1days)
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Registration To Software Science (SS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Reachability Analysis for Timed Systems using Parallel Processing
Sub Title (in English)
Keyword(1) Timed Automaton
Keyword(2) Model Checking
Keyword(3) CEGAR
Keyword(4) Parallel Processing
1st Author's Name Toshiaki TANAKA
1st Author's Affiliation Graduate School of Information Science and Texhnology, Osaka University()
2nd Author's Name Takeshi NAGAOKA
2nd Author's Affiliation Graduate School of Information Science and Texhnology, Osaka University
3rd Author's Name Kozo OKANO
3rd Author's Affiliation Graduate School of Information Science and Texhnology, Osaka University
4th Author's Name Shinji KUSUMOTO
4th Author's Affiliation Graduate School of Information Science and Texhnology, Osaka University
Date 2010-08-05
Paper # SS2010-22
Volume (vol) vol.110
Number (no) 169
Page pp.pp.-
#Pages 6
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