Presentation	2010/8/19 Design Constraint of Fine Grain Supply Voltage Control LSI : In the case of Power Gating Technique Atsuki Inoue,
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Abstract(in English)	Supply voltage control technique for realizing low power LSI is utilized not only for general purpose processors but also for custom ASICs thanks to advanced LSI design environments. Recently fine grain supply voltage control in term of space and/or time has been referred as promising technique to reduce power consumption. However, the transient fine grain control requires additional energy overhead for control itself, it must be some design constraint which has not been discussed clearly. In this presentation, we discuss consumed energy including this overhead using simple circuit model when we apply power gating technique and try to make clear what kind of design constraints we have and which are the major parameters for its constraint.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	Power gating / Supply voltage control / Fine grain control
Paper #	ICD2010-47,SDM2010-132
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Conference Information
Committee	ICD
Conference Date	2010/8/19(1days)
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Paper Information
Registration To	Integrated Circuits and Devices (ICD)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Design Constraint of Fine Grain Supply Voltage Control LSI : In the case of Power Gating Technique
Sub Title (in English)
Keyword(1)	Power gating
Keyword(2)	Supply voltage control
Keyword(3)	Fine grain control
1st Author's Name	Atsuki Inoue
1st Author's Affiliation	Fujitsu Laboratories Ltd., Platform Technology Lab.()
Date	2010/8/19
Paper #	ICD2010-47,SDM2010-132
Volume (vol)	vol.110
Number (no)	183
Page	pp.pp.-
#Pages	5
Date of Issue