Presentation	2010-07-22 On-Chip Waveform Capture and Diagnosis of Power Delivery in SoC Integration Takushi HASHIDA, Hiroshi MATSUMOTO, Makoto NAGATA,
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Abstract(in English)	On-chip waveform capture exhibits the resolution of 10 ps and 200 μV with 1024 steps, and SFDR of 63.2dB in 700-MHz signal bandwidth of interest. On-chip signal probing as well as digital waveform processing are merged in systems-on-a-chip (SoC) integration. An exciter is combined for on-chip derivation of LCR parasitics from oscillatory waveforms of a power delivery network that are effectively seen by SoC circuits.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	On-chip monitoring / Power supply noise / Power integrity
Paper #	ICD2010-21
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Conference Information
Committee	ICD
Conference Date	2010/7/15(1days)
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Paper Information
Registration To	Integrated Circuits and Devices (ICD)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	On-Chip Waveform Capture and Diagnosis of Power Delivery in SoC Integration
Sub Title (in English)
Keyword(1)	On-chip monitoring
Keyword(2)	Power supply noise
Keyword(3)	Power integrity
1st Author's Name	Takushi HASHIDA
1st Author's Affiliation	Graduate School of Engineering, Kobe University()
2nd Author's Name	Hiroshi MATSUMOTO
2nd Author's Affiliation	Graduate School of System Infomatics, Kobe University
3rd Author's Name	Makoto NAGATA
3rd Author's Affiliation	Graduate School of System Infomatics, Kobe University
Date	2010-07-22
Paper #	ICD2010-21
Volume (vol)	vol.110
Number (no)	140
Page	pp.pp.-
#Pages	4
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