Presentation | 2010-08-26 III-V CMOS platform technologies for high-performance electric-photonic integrated circuits Mitsuru TAKENAKA, Masafumi YOKOYAMA, Masakazu SUGIYAMA, Yoshiaki NAKANO, Shinichi TAKAGI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We propose the III-V CMOS photonics platform which can monolithically integrate ultracompact III-V photonics and high-performance III-V CMOS transistors by using the III-V-on-Insulator (III-V-OI) substrate. The III-V-OI substrate was fabricated by direct wafer bonding of an InGaAsP/InP wafer to a thermally oxidized Si wafer. The InGaAsP ultrahigh index contrast photonic wire waveguide allowed the miniaturization of the III-V photonics, thus we have successfully demonstrated the loss-less ultrasmall bend waveguide with the bending radius of 5 μm. The ultrasmall arrayed waveguide grating (AWG) has also been demonstrated, and the reduction of the 4 channel AWG size with 600-GHz channel spacing down to be 147×92 μm^2 was achieved. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | CMOS photonics / electro-photonic integrated circuit / III-V-on-Insulator / Wafer bonding |
Paper # | EMD2010-35,CPM2010-51,OPE2010-60,LQE2010-33 |
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Conference Information | |
Committee | CPM |
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Conference Date | 2010/8/19(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Component Parts and Materials (CPM) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | III-V CMOS platform technologies for high-performance electric-photonic integrated circuits |
Sub Title (in English) | |
Keyword(1) | CMOS photonics |
Keyword(2) | electro-photonic integrated circuit |
Keyword(3) | III-V-on-Insulator |
Keyword(4) | Wafer bonding |
1st Author's Name | Mitsuru TAKENAKA |
1st Author's Affiliation | Department of Electrical Engineering and Information Systems, The University of Tokyo() |
2nd Author's Name | Masafumi YOKOYAMA |
2nd Author's Affiliation | Department of Electrical Engineering and Information Systems, The University of Tokyo |
3rd Author's Name | Masakazu SUGIYAMA |
3rd Author's Affiliation | Department of Electrical Engineering and Information Systems, The University of Tokyo |
4th Author's Name | Yoshiaki NAKANO |
4th Author's Affiliation | Department of Electrical Engineering and Information Systems, The University of Tokyo |
5th Author's Name | Shinichi TAKAGI |
5th Author's Affiliation | Department of Electrical Engineering and Information Systems, The University of Tokyo |
Date | 2010-08-26 |
Paper # | EMD2010-35,CPM2010-51,OPE2010-60,LQE2010-33 |
Volume (vol) | vol.110 |
Number (no) | 179 |
Page | pp.pp.- |
#Pages | 4 |
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