| Presentation | 2010-07-22 Investigation to Speed Up Single-flux-quantum Circuits by Applying Higher Bias Voltage Masamitsu Tanaka, Hiroyuki Akaike, Akira Fujimaki, Kazuyoshi Takagi, Nobuyuki Yoshikawa, Shuichi Nagasawa, Naofumi Takagi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We investigate to speed up operating speed of single-flux-quantum circuits by applying higher bias voltage, which supply power to the circuits. Every bias current is supplied to each Josephson junction through a bias resistor connected to a constant-voltage power source in typical single-flux-quantum circuits. An insufficient bias voltage source, however, does not perform a virtual constant-current source, and makes slower switching of junctions. Our numerical simulations show that the switching speed is saturated for the bias voltage of ～100I_cR_s, where I_c and R_s, are critical current of junction and shunt resistance, respectively. It is also shown that larger parasitic inductance in series to bias resistors increase switching speeds, but also can limit clock frequencies due to larger time constant. We measured delay times using ring oscillators powered by several bias voltages. The measured results agree well with the numerical prediction. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Single-flux-quantum circuit / bias voltage / speed up |
| Paper # | SCE2010-20 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 2010/7/15(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Investigation to Speed Up Single-flux-quantum Circuits by Applying Higher Bias Voltage |
| Sub Title (in English) | |
| Keyword(1) | Single-flux-quantum circuit |
| Keyword(2) | bias voltage |
| Keyword(3) | speed up |
| 1st Author's Name | Masamitsu Tanaka |
| 1st Author's Affiliation | Nagoya University:CREST-JST() |
| 2nd Author's Name | Hiroyuki Akaike |
| 2nd Author's Affiliation | Nagoya University:CREST-JST |
| 3rd Author's Name | Akira Fujimaki |
| 3rd Author's Affiliation | Nagoya University:CREST-JST |
| 4th Author's Name | Kazuyoshi Takagi |
| 4th Author's Affiliation | Nagoya University:CREST-JST |
| 5th Author's Name | Nobuyuki Yoshikawa |
| 5th Author's Affiliation | Yokohama National University:CREST-JST |
| 6th Author's Name | Shuichi Nagasawa |
| 6th Author's Affiliation | Superconductivity Research Laboratory:CREST-JST |
| 7th Author's Name | Naofumi Takagi |
| 7th Author's Affiliation | Kyoto University:CREST-JST |
| Date | 2010-07-22 |
| Paper # | SCE2010-20 |
| Volume (vol) | vol.110 |
| Number (no) | 139 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |