Presentation | 2010-07-22 High-Speed Test of a Radix-2 Butterfly Processing Element for the Fast Fourier Transform using SFQ Circuits Fumishige MIYAOKA, Yasuhiro SHIMAMURA, Toshiki KAINUMA, Yuki YAMANASHI, Nobuyuki YOSHIKAWA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Fast Fourier transform (FFT) is the arithmetic algorithm to do discrete Fourier transform at high speed on the computer. It is applied in a wide field like the voice analysis and the image analysis, etc. Hardware-based FFT processing has been under investigation, and many FFT processors are implemented using semiconductor integrated circuits based on various algorithms. However, a large amount of circuit operations are necessary in the FFT processor, and their power consumption becomes serious problems. Single flux quantum (SFQ) FFT processor has potential to solve the problem because of its ultra low power consumption and high-speed operation. In this study, we designed and implemented a radix-2 butterfly processing element for the FFT processor, and examined its high-speed operations by on-chip high-speed tests. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | SFQ / FFT / butterfly processing unit / superconductive integrated circuit |
Paper # | SCE2010-17 |
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Conference Information | |
Committee | SCE |
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Conference Date | 2010/7/15(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Superconductive Electronics (SCE) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | High-Speed Test of a Radix-2 Butterfly Processing Element for the Fast Fourier Transform using SFQ Circuits |
Sub Title (in English) | |
Keyword(1) | SFQ |
Keyword(2) | FFT |
Keyword(3) | butterfly processing unit |
Keyword(4) | superconductive integrated circuit |
1st Author's Name | Fumishige MIYAOKA |
1st Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University() |
2nd Author's Name | Yasuhiro SHIMAMURA |
2nd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
3rd Author's Name | Toshiki KAINUMA |
3rd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
4th Author's Name | Yuki YAMANASHI |
4th Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
5th Author's Name | Nobuyuki YOSHIKAWA |
5th Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
Date | 2010-07-22 |
Paper # | SCE2010-17 |
Volume (vol) | vol.110 |
Number (no) | 139 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |