Presentation | 2010-03-04 A Study on Face Recognition Using LAB for Embedded Hardware Implementation Yutaka Usui, Katsuya Kondo, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Many fast and accurate face detection system have been proposed. However, it is not easy to implement a face recognition system to low computational cost system such as camera network and moving robots. In this report, a face recognition method for embedded hardware is presented. A combination of LAB(Locally Assembled Binary Patterns) and Discrete Adaboost method achieves 15% reduction of computational cost without sacrificing recognition accuracy. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | LAB / LBP / Haarlike feature / FPGA |
Paper # | SIS2009-57 |
Date of Issue |
Conference Information | |
Committee | SIS |
---|---|
Conference Date | 2010/2/25(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Smart Info-Media Systems (SIS) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Study on Face Recognition Using LAB for Embedded Hardware Implementation |
Sub Title (in English) | |
Keyword(1) | LAB |
Keyword(2) | LBP |
Keyword(3) | Haarlike feature |
Keyword(4) | FPGA |
1st Author's Name | Yutaka Usui |
1st Author's Affiliation | Raytron, Inc.:Dept. Information and Electronics, Graduate School of Eng., Tottori University() |
2nd Author's Name | Katsuya Kondo |
2nd Author's Affiliation | Dept. Information and Electronics, Graduate School of Eng., Tottori University |
Date | 2010-03-04 |
Paper # | SIS2009-57 |
Volume (vol) | vol.109 |
Number (no) | 447 |
Page | pp.pp.- |
#Pages | 4 |
Date of Issue |