| Presentation | 2010-03-05 Throughput Performance Comparison between Overlap FDE and Sliding-window Chip Equalizer for DS-CDMA HARQ Tatsunori OBARA, Kazuki TAKEDA, Fumiyuki ADACHI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In direct sequence code division multiple access (DS-CDMA), frequency-domain equalization (FDE) based on minimum mean square error (MMSE) criterion can achieve much better performance than the well-known rake combining. The conventional FDE requires the insertion of cyclic prefix (CP) into guard interval (GI). However, the CP insertion reduces the throughput. Recently, overlap FDE that requires no CP insertion was proposed. Another equalization technique is a time-domain sliding window chip equalizer (SWCE) based on MMSE criterion. In our previous paper, we evaluated and compared the bit error rate (BER) performances of multi-code DS-CDMA using SWCE and overlap FDE, and showed that overlap FDE can achieve almost the same BER performance as SWCE with much less computational complexity. In this paper, we evaluate by computer simulation and compare the throughput performances of DS-CDMA hybrid ARQ (HARQ) using overlap FDE and SWCE. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Overlap FDE / Sliding-window chip equalizer (SWCE) / DS-CDMA / hybrid ARQ (HARQ) |
| Paper # | RCS2009-308 |
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| Conference Information | |
| Committee | RCS |
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| Conference Date | 2010/2/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Radio Communication Systems (RCS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Throughput Performance Comparison between Overlap FDE and Sliding-window Chip Equalizer for DS-CDMA HARQ |
| Sub Title (in English) | |
| Keyword(1) | Overlap FDE |
| Keyword(2) | Sliding-window chip equalizer (SWCE) |
| Keyword(3) | DS-CDMA |
| Keyword(4) | hybrid ARQ (HARQ) |
| 1st Author's Name | Tatsunori OBARA |
| 1st Author's Affiliation | Dept. of Electrical and Communication Engineering, Graduate School of Engineering, Tohoku University() |
| 2nd Author's Name | Kazuki TAKEDA |
| 2nd Author's Affiliation | Dept. of Electrical and Communication Engineering, Graduate School of Engineering, Tohoku University |
| 3rd Author's Name | Fumiyuki ADACHI |
| 3rd Author's Affiliation | Dept. of Electrical and Communication Engineering, Graduate School of Engineering, Tohoku University |
| Date | 2010-03-05 |
| Paper # | RCS2009-308 |
| Volume (vol) | vol.109 |
| Number (no) | 440 |
| Page | pp.pp.- |
| #Pages | 6 |
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