| Presentation | 2010-01-27 A Packet Classifier Using a Parallel Branching Program Machine Hiroki NAKAHARA, Tsutomu SASAO, Munehiro MATSUURA, Yoshifumi KAWAMURA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A branching program machine (BM) is a special-purpose processor that uses only two kinds of instructions: Branch and output instructions. Thus, the architecture for the BM is much simpler than that for a general-purpose microprocessor (MPU). Since the BM uses the dedicated instructions for a special-purpose application, it is faster than the MPU. This paper presents a packet classifier using a parallel BMs (PBM). To reduce computation time and code size, first, a set of rules for packet classifier is partitioned into subsets. Then, the PBM evaluates them in parallel. Also, the paper shows a method to estimate the necessary number of BMs to realize a given packet classifier. We implemented the PBM32, a system using 32 BMs, on an FPGA, and compared it with the Intel's Core2Duo@1.2GHz microprocessor. The PBM32 is 8.1-11.1 times faster than the Core2Duo, and the PBM32 requries only 0.2-10.3 percent of the memory for the Core2Duo. |
| Keyword(in Japanese) | (See Japanese page) |
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| Paper # | VLD2009-92,CPSY2009-74,RECONF2009-77 |
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| Committee | VLD |
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| Conference Date | 2010/1/19(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Packet Classifier Using a Parallel Branching Program Machine |
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| 1st Author's Name | Hiroki NAKAHARA |
| 1st Author's Affiliation | Department of Computer Science and Electronics, Kyushu Institute of Technology() |
| 2nd Author's Name | Tsutomu SASAO |
| 2nd Author's Affiliation | Department of Computer Science and Electronics, Kyushu Institute of Technology |
| 3rd Author's Name | Munehiro MATSUURA |
| 3rd Author's Affiliation | Department of Computer Science and Electronics, Kyushu Institute of Technology |
| 4th Author's Name | Yoshifumi KAWAMURA |
| 4th Author's Affiliation | Department of Computer Science and Electronics, Kyushu Institute of Technology |
| Date | 2010-01-27 |
| Paper # | VLD2009-92,CPSY2009-74,RECONF2009-77 |
| Volume (vol) | vol.109 |
| Number (no) | 393 |
| Page | pp.pp.- |
| #Pages | 6 |
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