Presentation 2009-12-03
Detection of Fault Candidate portions by DEF data Visualization
Kazuaki KISHI, Masaru SANADA,
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Abstract(in English) Line information visualized using DEF data, and layout data of unique fault formations makes it possible to indicate fault formations and to detect the intended line names. The former formations are applied to discern the physical analysis positions for real fault LSI. The latter names are used to pull out the gate circuit positions connect to net names among cell circuit. The above data combined with connection information of transistor level has been led to an easy fault diagnosis technology based on voltage value.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) LSI / DEF / fault diagnosis / fault candidate / visualization / net name
Paper # VLD2009-53,DC2009-40
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Conference Information
Committee VLD
Conference Date 2009/11/25(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Detection of Fault Candidate portions by DEF data Visualization
Sub Title (in English)
Keyword(1) LSI
Keyword(2) DEF
Keyword(3) fault diagnosis
Keyword(4) fault candidate
Keyword(5) visualization
Keyword(6) net name
1st Author's Name Kazuaki KISHI
1st Author's Affiliation Kochi University of Technology()
2nd Author's Name Masaru SANADA
2nd Author's Affiliation Kochi University of Technology
Date 2009-12-03
Paper # VLD2009-53,DC2009-40
Volume (vol) vol.109
Number (no) 315
Page pp.pp.-
#Pages 4
Date of Issue