| Presentation | 2009-12-14 An Improved Face-Detection Method for a Massive-Parallel Memory-Embedded SIMD Matrix Processor MX-1 Hirokazu HIRAMOTO, Takeshi KUMAKI, Yuta IMAI, Tetsushi KOIDE, MATTAUSCH Hans JURGEN, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently, face-detection processing is more widely used in security applications, such as video surveillance system or entrance and exit monitoring system. Therefore, real-time processing becomes practically important, since a delay in detection time means a loss in safety for the system-manager. Conventional general purpose processors, or digital-signal processors, have high flexibility, but have difficulties to keep the real-time processing specifications. On the other hand, face-detection ASICs tend to increase the hardware cost and how to be redesigned when the processing algorithm changes. In this paper, a high-speed and a highly-accuracy parallel face-detection processing technique, which uses a Massive-Parallel Memory-Embedded SIMD Matrix processor (MX-1) is proposed to solve the above problems. The MX-1 can execute the face-detection algorithm in real-time and operates with power consumption of about 150 mW. Furthermore, MX-1 is programmable and therefore implements a soft-ware-based architecture. The face-detection algorithm applies Haar-like features and the AdaBoost algorithm. For effective face-detection processing, scan-window parallelization and reduction of the number of Haar-like features is also proposed. The achieved detection time is about 300 ms at 162 MHz clock frequency by using an evaluation board equipped with the MX-1 processor. Moreover, while keeping the accuracy of the face-detection rate, the number of Haar-like features can be reduced by about 85% below that of conventional public-domain software. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Face detection / Parallel processing / SIMD processor / Low power consumption |
| Paper # | ICD2009-92 |
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| Committee | ICD |
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| Conference Date | 2009/12/7(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Improved Face-Detection Method for a Massive-Parallel Memory-Embedded SIMD Matrix Processor MX-1 |
| Sub Title (in English) | |
| Keyword(1) | Face detection |
| Keyword(2) | Parallel processing |
| Keyword(3) | SIMD processor |
| Keyword(4) | Low power consumption |
| 1st Author's Name | Hirokazu HIRAMOTO |
| 1st Author's Affiliation | Research Institute for Nanodevice and Bio Systems, Hiroshima Univ.() |
| 2nd Author's Name | Takeshi KUMAKI |
| 2nd Author's Affiliation | Research Institute for Nanodevice and Bio Systems, Hiroshima Univ. |
| 3rd Author's Name | Yuta IMAI |
| 3rd Author's Affiliation | Research Institute for Nanodevice and Bio Systems, Hiroshima Univ. |
| 4th Author's Name | Tetsushi KOIDE |
| 4th Author's Affiliation | Research Institute for Nanodevice and Bio Systems, Hiroshima Univ. |
| 5th Author's Name | MATTAUSCH Hans JURGEN |
| 5th Author's Affiliation | Research Institute for Nanodevice and Bio Systems, Hiroshima Univ. |
| Date | 2009-12-14 |
| Paper # | ICD2009-92 |
| Volume (vol) | vol.109 |
| Number (no) | 336 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |