| Presentation | 2009-12-14 Intermittent Pulse Generator for Ultra-Low Power LSIs Hiromichi MATSUSHITA, Ken UENO, Tetsuya ASAI, Yoshihito AMEMIYA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We proposed a timer circuit for the intermittent operation of ultra-lowpower LSIs. The circuit consists of a clock oscillator, an array of T-flip-flops, and a logic circuit to produce intermittent pulses. The clock oscillator is a ring oscillator controlled by a reference resistor and a capacitor, and generates stable clocks whose frequency is determined by the time constant of the reference resistor and capacitor. The T-flip-flop array accepts the clocks and produces divided pulses. The logic circuit accepts the clocks and divided pulses and produces an intermittent pulse to switch the power of LSIs. Theoretical analyses and SPICE simulation with 0.35-um CMOS parameters showed that the power dissipation of our timer circuit was 0.2 uW or less and that the period and width of the intermittent pulse could be controlled in a range from microseconds to days. Our timer circuit would be an useful device for the low-power operation of power-aware LSIs. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CMOS / intermittent operation / reference clock timer / oscillator / Ultra-low power |
| Paper # | ICD2009-89 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2009/12/7(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Intermittent Pulse Generator for Ultra-Low Power LSIs |
| Sub Title (in English) | |
| Keyword(1) | CMOS |
| Keyword(2) | intermittent operation |
| Keyword(3) | reference clock timer |
| Keyword(4) | oscillator |
| Keyword(5) | Ultra-low power |
| 1st Author's Name | Hiromichi MATSUSHITA |
| 1st Author's Affiliation | Faculty of Engineering, Hokkaido University() |
| 2nd Author's Name | Ken UENO |
| 2nd Author's Affiliation | Faculty of Engineering, Hokkaido University |
| 3rd Author's Name | Tetsuya ASAI |
| 3rd Author's Affiliation | Faculty of Engineering, Hokkaido University |
| 4th Author's Name | Yoshihito AMEMIYA |
| 4th Author's Affiliation | Faculty of Engineering, Hokkaido University |
| Date | 2009-12-14 |
| Paper # | ICD2009-89 |
| Volume (vol) | vol.109 |
| Number (no) | 336 |
| Page | pp.pp.- |
| #Pages | 6 |
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