Presentation | 2009-12-14 Process Variation Compensation Technique for 0.5-V Body-Input Comparator Jun WANG, Toshimasa MATSUOKA, Kenji TANIGUCHI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This work presents a compensation method for low-voltage body-input comparator to alleviate performance degradation due to process variations. The designed body-input comparator using the proposed compensation method is designed in a standard 0.18μm CMOS process with a 0.5V supply. The simulation results show that it keeps high resolution at various simulation corners, and that the output common-mode voltage maintains around V_ |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Body-input / comparator / process variation compensation |
Paper # | ICD2009-86 |
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Committee | ICD |
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Conference Date | 2009/12/7(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Integrated Circuits and Devices (ICD) |
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Language | ENG |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Process Variation Compensation Technique for 0.5-V Body-Input Comparator |
Sub Title (in English) | |
Keyword(1) | Body-input |
Keyword(2) | comparator |
Keyword(3) | process variation compensation |
1st Author's Name | Jun WANG |
1st Author's Affiliation | Department of Electrical, Electronic and Information Engineering, Osaka University() |
2nd Author's Name | Toshimasa MATSUOKA |
2nd Author's Affiliation | Department of Electrical, Electronic and Information Engineering, Osaka University |
3rd Author's Name | Kenji TANIGUCHI |
3rd Author's Affiliation | Department of Electrical, Electronic and Information Engineering, Osaka University |
Date | 2009-12-14 |
Paper # | ICD2009-86 |
Volume (vol) | vol.109 |
Number (no) | 336 |
Page | pp.pp.- |
#Pages | 2 |
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