Presentation 2009-12-14
Simulation of Substrate Noise Impact on CMOS Analog Circuits
Satoshi TAKAYA, Yoji BANDO, Makoto NAGATA,
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Abstract(in English) We have measured and simulated substrate noise impact on basic analog amplifier using 90-nm CMOS test chip. To measure substrate noise impact on amplifier, we built the experiment system that could monitor substrate noise and output signal of the amplifier. In this experiment system, substrate noise was generated by injecting AC signal from off-chip to substrate of this test chip. The evaluation result shows that substrate noise impacts an amplifier and the sensitivity is different on differential amplifier. On the other hand we simulated substrate noise impact on amplifier including a power supply and ground model.
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Keyword(in English) Mixed signal LSI / Substrate noise / Noise response
Paper # ICD2009-81
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Conference Date 2009/12/7(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Simulation of Substrate Noise Impact on CMOS Analog Circuits
Sub Title (in English)
Keyword(1) Mixed signal LSI
Keyword(2) Substrate noise
Keyword(3) Noise response
1st Author's Name Satoshi TAKAYA
1st Author's Affiliation Dept. of Computer Scitence and Systems Engineering, Kobe University()
2nd Author's Name Yoji BANDO
2nd Author's Affiliation Dept. of Computer Scitence and Systems Engineering, Kobe University
3rd Author's Name Makoto NAGATA
3rd Author's Affiliation Dept. of Computer Scitence and Systems Engineering, Kobe University
Date 2009-12-14
Paper # ICD2009-81
Volume (vol) vol.109
Number (no) 336
Page pp.pp.-
#Pages 4
Date of Issue