Presentation 2010-01-26
Hardware Specialization of Digital Filters for Vibration Control
Yasuaki TEZUKA, Shuichi ICHIKAWA, Yoshiyuki NODA,
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Abstract(in English) The logic circuit can generally be reduced, if any input of the circuit is given as a constant. The derived circuit might be even faster than the original, because of the reduction of logic depth and layout area. Since the derived circuit is specialized to a specific input, such technique is called as hardware specialization. The purpose of this study is to evaluate the hardware specialization technique in digital filters and vibration control systems. Altera Cyclone III FPGA and Quartus II software were adopted as evaluation platform. In case of a third-order Butterworth low-pass filter, its logic scale was reduced to 40-56% of the original by fixing the gain parameters. In a hybrid-shaped approach with a low-pass filter and a notch filter, the logic scale was reduced to 48% of the original by fixing the parameters of these filters. In a preshaping circuit with a low-pass filter, the respective logic scale was reduced to 7.5% and 11% of the original by fixing parameters and input wave form. In the circuits specialized to a fixed wave form, the logic scale was a linear function of the bit width of the input data.
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Keyword(in English) FPGA / Digital Filter / Hardware Specialization
Paper # VLD2009-82,CPSY2009-64,RECONF2009-67
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Committee CPSY
Conference Date 2010/1/19(1days)
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Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Hardware Specialization of Digital Filters for Vibration Control
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) Digital Filter
Keyword(3) Hardware Specialization
1st Author's Name Yasuaki TEZUKA
1st Author's Affiliation Dept. Knowledge-based Information Engineering, Toyohashi University of Technology()
2nd Author's Name Shuichi ICHIKAWA
2nd Author's Affiliation Dept. Knowledge-based Information Engineering, Toyohashi University of Technology
3rd Author's Name Yoshiyuki NODA
3rd Author's Affiliation Dept. Production Systems Engineering, Toyohashi University of Technology
Date 2010-01-26
Paper # VLD2009-82,CPSY2009-64,RECONF2009-67
Volume (vol) vol.109
Number (no) 394
Page pp.pp.-
#Pages 6
Date of Issue