| Presentation | 2010-01-26 Implementation Method and Performance Evaluation of Residue Arithmetic Circuits Using Signed-Digit Number Representation Mingda ZHANG, Shugang WEI, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, residue arithmetic circuits using SD (signed-Digit) number representation are proposed. To simplify the SD residue adder, new addition rules are used for generating the intermediate sum and carry with a binary number representation. By using the new coding method, the proposed residue addition requires less hardware and short delay time than previous one. Moreover, residue multipliers using the SD residue adders are also designed with the inputs and outputs by SD number and binary number representation. The performance evaluation of the residue arithmetic circuits are discussed by comparing with an efficient Diminshed-One modulo 2^n+1 multiplier. As a result, the design and simulation results of proposed residue arithmetic circuits show that high speed arithmetic circuits can be obtained. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SD (signed-Digit) number representation / residue number system / SD modulo addition / SD modulo multiplication / Binary modulo arithmetic |
| Paper # | VLD2009-81,CPSY2009-63,RECONF2009-66 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2010/1/19(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation Method and Performance Evaluation of Residue Arithmetic Circuits Using Signed-Digit Number Representation |
| Sub Title (in English) | |
| Keyword(1) | SD (signed-Digit) number representation |
| Keyword(2) | residue number system |
| Keyword(3) | SD modulo addition |
| Keyword(4) | SD modulo multiplication |
| Keyword(5) | Binary modulo arithmetic |
| 1st Author's Name | Mingda ZHANG |
| 1st Author's Affiliation | Department of Computer Science Gunma Univ.() |
| 2nd Author's Name | Shugang WEI |
| 2nd Author's Affiliation | Department of Computer Science Gunma Univ. |
| Date | 2010-01-26 |
| Paper # | VLD2009-81,CPSY2009-63,RECONF2009-66 |
| Volume (vol) | vol.109 |
| Number (no) | 394 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |