Presentation 2010-01-26
An FPGA Implementation of Array Processor Performing 3D-DCT Effectively
Yuki Ikegaki, Hiroyuki Igarashi, Toshiaki Miyazaki, Stanislav G. Sedukhin,
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Abstract(in English) Ordinary array processors randomly access to input-/coefficient-data in external memories many times during the 3D-DCT, and it is a significant bottleneck of the high-speed data processing. In this paper, three dimensional array processor dedicated to 3D-DCT is proposed. The array processor extremely reduces the data swapping or replacement during calculation, and it contributes to improving the performance greatly. The computational complexity of the proposed array processor is O(N) for an N×N×N input data cube, while that of the 3D-DCT direct calculation is O(N^4). Data I/O and area-improved architectures are also discussed in consideration of their practical implementation. The proposed array processor is implemented in an FPGA. The FPGA implementation results show that our architecture satisfies performance for real-time 3D-DCT with rich scalability.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) 3D-DCT / 3D-LSI / Array processor / FPGA implementation
Paper # VLD2009-76,CPSY2009-58,RECONF2009-61
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Conference Information
Committee CPSY
Conference Date 2010/1/19(1days)
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Paper Information
Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An FPGA Implementation of Array Processor Performing 3D-DCT Effectively
Sub Title (in English)
Keyword(1) 3D-DCT
Keyword(2) 3D-LSI
Keyword(3) Array processor
Keyword(4) FPGA implementation
1st Author's Name Yuki Ikegaki
1st Author's Affiliation Graduate School of Computer Science and Engineering, University of Aizu()
2nd Author's Name Hiroyuki Igarashi
2nd Author's Affiliation School of Computer Science and Engineering, University of Aizu
3rd Author's Name Toshiaki Miyazaki
3rd Author's Affiliation Graduate School of Computer Science and Engineering, University of Aizu
4th Author's Name Stanislav G. Sedukhin
4th Author's Affiliation Graduate School of Computer Science and Engineering, University of Aizu
Date 2010-01-26
Paper # VLD2009-76,CPSY2009-58,RECONF2009-61
Volume (vol) vol.109
Number (no) 394
Page pp.pp.-
#Pages 6
Date of Issue