Presentation 2010-03-15
Image sensor using dynamic reconfiguration
Maki YASUDA, Minoru WATANABE,
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Abstract(in English) In recent years, development of a high-speed image processing system is required for autonomous robots and cars, and so on. Since such embedded system must execute image processing operations at 1000 frames/s, there are issues in transferring image information and processing it. Up to now, some vision chips including processing elements have been developed. However, such vision chip can execute only simple operations and its performance is insufficient. Therefore, we have been developing a dynamically reconfigurable image processor device. This paper presents a dynamically reconfigurable image processor architecture and some experimental results.
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Keyword(in English) Optically Reconfigurable Gate Arrays (ORGAs) / Holographic memory / Dynamic reconfiguration / Image sensor
Paper # IE2009-193
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Committee IE
Conference Date 2010/3/8(1days)
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Registration To Image Engineering (IE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Image sensor using dynamic reconfiguration
Sub Title (in English)
Keyword(1) Optically Reconfigurable Gate Arrays (ORGAs)
Keyword(2) Holographic memory
Keyword(3) Dynamic reconfiguration
Keyword(4) Image sensor
1st Author's Name Maki YASUDA
1st Author's Affiliation Faculty of Engineering, Shizuoka University()
2nd Author's Name Minoru WATANABE
2nd Author's Affiliation Faculty of Engineering, Shizuoka University
Date 2010-03-15
Paper # IE2009-193
Volume (vol) vol.109
Number (no) 469
Page pp.pp.-
#Pages 4
Date of Issue