Presentation 2010-01-15
A 32-GS/s 6-bit Double-Sampling DAC in InP HBT Technology
Munehiko NAGATANI, Hideyuki NOSAKA, Shogo YAMANAKA, Kimikazu SANO, Koichi MURATA,
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Abstract(in English) We have developed an ultrahigh-speed 6-bit DAC with InP HBT Technology. To achieve ultrahigh-speed operation, we devised a novel double-sampling technique. With this technique, the DAC can operate at a sampling rate of 32 GS/s. This is the first 6-bit DAC that can operate at a sampling rate of over 30 GS/s. This is a promising component for next generation of coherent optical communications systems.
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Keyword(in English) DAC / R-2R / Current-Steering / Double-Sampling / InP HBT
Paper # ED2009-191,MW2009-174
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Committee ED
Conference Date 2010/1/6(1days)
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Paper Information
Registration To Electron Devices (ED)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A 32-GS/s 6-bit Double-Sampling DAC in InP HBT Technology
Sub Title (in English)
Keyword(1) DAC
Keyword(2) R-2R
Keyword(3) Current-Steering
Keyword(4) Double-Sampling
Keyword(5) InP HBT
1st Author's Name Munehiko NAGATANI
1st Author's Affiliation NTT Photonics Laboratories, NTT Corporation()
2nd Author's Name Hideyuki NOSAKA
2nd Author's Affiliation NTT Photonics Laboratories, NTT Corporation
3rd Author's Name Shogo YAMANAKA
3rd Author's Affiliation NTT Network Innovation Laboratories, NTT Corporation
4th Author's Name Kimikazu SANO
4th Author's Affiliation NTT Photonics Laboratories, NTT Corporation
5th Author's Name Koichi MURATA
5th Author's Affiliation NTT Photonics Laboratories, NTT Corporation
Date 2010-01-15
Paper # ED2009-191,MW2009-174
Volume (vol) vol.109
Number (no) 360
Page pp.pp.-
#Pages 5
Date of Issue