Presentation 2010-01-14
A Normally-off AlGaN/GaN HFET with High Threshold Voltage Uniformity
Kazuki OTA, Kazuomi ENDO, Yasuhiro OKAMOTO, Yuji ANDO, Hironobu Miyamoto, Hidenori SHIMAWAKI,
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Abstract(in English) In this paper, we successfully demonstrate a recessed gate normally-off AlGaN/GaN HFET on a silicon substrate with high threshold voltage(V_)uniformity and low on-resistance. In order to realize high V_ uniformity, a novel V_ control technique is proposed, which we call "piezo neutralization technique". This technique includes a piezo neutralization(PNT)layer formed at the bottom of the gate recess. Since the PNT layer neutralizes the polarization charges under the gate, the V_ comes to be independent of the gate-to-channel span. The fabricated normally-off GaN FET with PNT structure exhibits an excellent V_ uniformity(σV_=18mV)and a state-of-the-art combination of the specific on-resistance(R_A=500mΩmm^2)and the breakdown voltage(V_B=1260V). The normally-off GaN FETs with PNT structure show great promise as power devices.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) GaN / AlGaN / FET / E-mode / normally-off / uniformity / recessed gate
Paper # ED2009-189,MW2009-172
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Committee ED
Conference Date 2010/1/6(1days)
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Registration To Electron Devices (ED)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Normally-off AlGaN/GaN HFET with High Threshold Voltage Uniformity
Sub Title (in English)
Keyword(1) GaN
Keyword(2) AlGaN
Keyword(3) FET
Keyword(4) E-mode
Keyword(5) normally-off
Keyword(6) uniformity
Keyword(7) recessed gate
1st Author's Name Kazuki OTA
1st Author's Affiliation Nano Electronics Research Laboratories, NEC Corporation()
2nd Author's Name Kazuomi ENDO
2nd Author's Affiliation Nano Electronics Research Laboratories, NEC Corporation
3rd Author's Name Yasuhiro OKAMOTO
3rd Author's Affiliation Nano Electronics Research Laboratories, NEC Corporation
4th Author's Name Yuji ANDO
4th Author's Affiliation Nano Electronics Research Laboratories, NEC Corporation
5th Author's Name Hironobu Miyamoto
5th Author's Affiliation Nano Electronics Research Laboratories, NEC Corporation
6th Author's Name Hidenori SHIMAWAKI
6th Author's Affiliation Nano Electronics Research Laboratories, NEC Corporation
Date 2010-01-14
Paper # ED2009-189,MW2009-172
Volume (vol) vol.109
Number (no) 360
Page pp.pp.-
#Pages 5
Date of Issue