| Presentation | 2010-05-13 A study on multicore designed MuCCRA-3: dynamically reconfigurable processor array Eiichi SASAKI, Yoshiki SAITO, Masayuki KIMURA, Hideharu AMANO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently, since a mobile device is required to provide various functions, a lot of specialized hardware modules must be embedded to fulfill required functions and performance. However, increasing number of embedded specialized hardware causes problems about developmental cost, area and power consumption. For solving these problems, Dynamically Reconfigurable Processor Array(DRPA)attracts attention as a flexible accelerator instead of specialized hardware. For using DRPAs instead of multiple specialized hardware, a single PE array often cannot support enough performance. That is, multi-core DRPA has become popular. In this study, we extended a DRPA MuCCRA-3 to a multi-core system, and evaluated its area and performance. By attaching a multi-task allocation mechanism, transfer buffer for cores, and shared memory to multiple MuCCRA-3 arrays, MuCCRA-3 Multicore(MuCCRA-3M)is formed. As a result of performance evaluation, 3-core MuCCRA-3M achieves about 2.7 times better performance than a single-core MuCCRA-3, by using pipelined task execution. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Dynamically Reconfigurable System / Multi-core System / Embedded System |
| Paper # | RECONF2010-4 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2010/5/6(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A study on multicore designed MuCCRA-3: dynamically reconfigurable processor array |
| Sub Title (in English) | |
| Keyword(1) | Dynamically Reconfigurable System |
| Keyword(2) | Multi-core System |
| Keyword(3) | Embedded System |
| 1st Author's Name | Eiichi SASAKI |
| 1st Author's Affiliation | Faculty of science and Technology, Keio University() |
| 2nd Author's Name | Yoshiki SAITO |
| 2nd Author's Affiliation | Faculty of science and Technology, Keio University |
| 3rd Author's Name | Masayuki KIMURA |
| 3rd Author's Affiliation | Faculty of science and Technology, Keio University |
| 4th Author's Name | Hideharu AMANO |
| 4th Author's Affiliation | Faculty of science and Technology, Keio University |
| Date | 2010-05-13 |
| Paper # | RECONF2010-4 |
| Volume (vol) | vol.110 |
| Number (no) | 32 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |