Presentation	2009-12-04 An Optimal Algorithm for 3-adress QDD Machine Code Taisuke FUKUYAMA, Tsutomu SASAO, Munehiro MATSUURA,
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Abstract(in English)	To speed up the evaluation of logic functions, we use quaternary decision diagrams(QDDs). A 3-adress QDD machine is a branching program machine which has 3-adress QDD branch instructions. In this paper, we show a method to minimize a 3-adress QDD machine code in time complexity of O(N^2), where N is the number of QDD nodes. We minimized codes for 3-adress QDD machines representing various benchmark functions. Experimental results are shown.
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Keyword(in English)	QDD / Branching Program Machine / QDD Machine
Paper #	RECONF2009-52
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Committee	RECONF
Conference Date	2009/11/26(1days)
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Registration To	Reconfigurable Systems (RECONF)
Language	JPN
Title (in Japanese)	(See Japanese page)
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Title (in English)	An Optimal Algorithm for 3-adress QDD Machine Code
Sub Title (in English)
Keyword(1)	QDD
Keyword(2)	Branching Program Machine
Keyword(3)	QDD Machine
1st Author's Name	Taisuke FUKUYAMA
1st Author's Affiliation	Department of Computer Science and Electronics, Kyusyu Institute of Technology()
2nd Author's Name	Tsutomu SASAO
2nd Author's Affiliation	Department of Computer Science and Electronics, Kyusyu Institute of Technology
3rd Author's Name	Munehiro MATSUURA
3rd Author's Affiliation	Department of Computer Science and Electronics, Kyusyu Institute of Technology
Date	2009-12-04
Paper #	RECONF2009-52
Volume (vol)	vol.109
Number (no)	320
Page	pp.pp.-
#Pages	6
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