Presentation 2009-12-03
A Virus Scanning Engine Using a Parallel Sieve Method and the MPU
Hiroki NAKAHARA, Tsutomu SASAO, Munehiro MATSUURA, Yoshifumi KAWAMURA,
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Abstract(in English) In this paper, we show a new architecture for the virus scanning machine, which is different from that of the intrusion detection machine. The proposed method uses the two-stage matching, which is area-throughput efficient. That is, in the first stage, the hardware filter quickly scans to find possible matches, and in the second stage, the MPU scans the real match by a brute-force method. To make the hardware filter simply, we will introduce finite-input memory machine(FIMM). To reduce the memory size in the FIMM, we will introduce the parallel sieve method. The proposed method uses memory, so the power consumption is lower than the TCAM-based method. The system is implemented on the Stratix III FPGA and three off chip SRAMs, where all ClamAV virus patterns(514287)are stored. Comparison with existing methods, as for the area-throughput ratio, our method is 1.41-31.36 times more efficient.
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Paper # RECONF2009-45
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Committee RECONF
Conference Date 2009/11/26(1days)
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Language JPN
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Title (in English) A Virus Scanning Engine Using a Parallel Sieve Method and the MPU
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1st Author's Name Hiroki NAKAHARA
1st Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology()
2nd Author's Name Tsutomu SASAO
2nd Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology
3rd Author's Name Munehiro MATSUURA
3rd Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology
4th Author's Name Yoshifumi KAWAMURA
4th Author's Affiliation Renesas Technology Corp.
Date 2009-12-03
Paper # RECONF2009-45
Volume (vol) vol.109
Number (no) 320
Page pp.pp.-
#Pages 6
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