Presentation 2009-12-03
A Case Study of Error Correction Technique for SRAM-based FPGA using the Partial Reconfiguration
Noritaka KAI, Yoshiaki TSUTSUMI, Motoki AMAGASAKI, Morihiro KUGA, Toshinori SUEYOSHI,
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Abstract(in English) The present paper describes an error correction technique for SRAM-based Field Programmable Gate Arrays(FPGAs)using the partial reconfiguration, which can handle the effects of Single Event Upsets(SEUs). We propose the error correction method using Frame-based partial reconfiguration from the configuration data of the FPGA. Although the only frame which affected SEU is reconfigured by using this method, this method is not supported officially on Xilinx EDA tools. The present study shows validity of frame-based partial reconfiguration method about combinational circuits and sequential circuits. As a result, the errors in combinational circuits and sequential circuits are corrected by using frame-based partial reconfiguration. In the case of sequential circuit, flip-flop stored adjacent data when frame-based partial reconfiguration.
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Keyword(in English) FPGA / partial reconfiguration / frame / error correction / SEU
Paper # RECONF2009-41
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Conference Information
Committee RECONF
Conference Date 2009/11/26(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Case Study of Error Correction Technique for SRAM-based FPGA using the Partial Reconfiguration
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) partial reconfiguration
Keyword(3) frame
Keyword(4) error correction
Keyword(5) SEU
1st Author's Name Noritaka KAI
1st Author's Affiliation Graduate School of Science and Technology, Kumamoto University()
2nd Author's Name Yoshiaki TSUTSUMI
2nd Author's Affiliation Graduate School of Science and Technology, Kumamoto University
3rd Author's Name Motoki AMAGASAKI
3rd Author's Affiliation Graduate School of Science and Technology, Kumamoto University
4th Author's Name Morihiro KUGA
4th Author's Affiliation Graduate School of Science and Technology, Kumamoto University
5th Author's Name Toshinori SUEYOSHI
5th Author's Affiliation Graduate School of Science and Technology, Kumamoto University
Date 2009-12-03
Paper # RECONF2009-41
Volume (vol) vol.109
Number (no) 320
Page pp.pp.-
#Pages 6
Date of Issue