| Presentation | 2010-03-28 Design and Evaluation of An Instruction Scheduler for FU Array Processor Kazuhiro YOSHIMURA, Munehisa AGARI, Takashi NAKADA, Yasuhiko NAKASHIMA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently, we have proposed Linear Array Pipeline Processor(LAPP)that improves energy efficiency for various workloads like image processing and maintains programmability by working on VLIW codes. In this paper, we proposed an instruction scheduler for LAPP to fully exploit the array execution functional units(FUs)and bypass networks by mapping the VLIW codes into the FUs dynamically. The dynamic scheduling can be finished within multi-cycles during a data prefetching before the FUs work concurrently. According to its design with HDL, the proposed scheduler has become the circuit area to 43% and the delay to 70% compared to a straightforward model. The scheduling also does not have any critical path in an FU array processor with the small footprint. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | instruction scheduling / array execution units / reconfigurable architecture |
| Paper # | CPSY2009-94,DC2009-91 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2010/3/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design and Evaluation of An Instruction Scheduler for FU Array Processor |
| Sub Title (in English) | |
| Keyword(1) | instruction scheduling |
| Keyword(2) | array execution units |
| Keyword(3) | reconfigurable architecture |
| 1st Author's Name | Kazuhiro YOSHIMURA |
| 1st Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology() |
| 2nd Author's Name | Munehisa AGARI |
| 2nd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| 3rd Author's Name | Takashi NAKADA |
| 3rd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| 4th Author's Name | Yasuhiko NAKASHIMA |
| 4th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| Date | 2010-03-28 |
| Paper # | CPSY2009-94,DC2009-91 |
| Volume (vol) | vol.109 |
| Number (no) | 475 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |