Presentation 2010-02-15
Consideration of Open Faults Model Based on Digital Measurement of TEG Chip
Toshiyuki TSUTSUMI, Yasuyuki KARIYA, Koji YAMAZAKI, Masaki HASHIZUME, Hiroyuki YOTSUYANAGI, Hiroshi TAKAHASHI, Yoshinobu HIGAMI, Yuzo TAKAMATSU,
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Abstract(in English) Countermeasures against an open fault in LSI testing become more important with advancement of LSI process technology. However, a practicable modeling of the open fault has not been performed yet. So, we have fabricated TEG(Test Element Group)chips into which open defects is intentionally built, and then we research on modeling the open fault based on the measurement data of the TEG chips. In this paper, modeling of the open fault is considered. A technique to calculate the influence of adjacent lines on the faulty line based on digital measurement data of the TEG chips using RCGA(Real-Coded Genetic Algorithm)is proposed. The proposed model based on the digital measurement using RCGA can mostly simulate the logical value of the line with open fault, and shows high quality without considering the interconnect structure. Moreover, we attempt to simplify the model by averaging the influence of adjacent lines, and the simplification shows effectiveness.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) open faults / TEG chip / fault model / LSI testing
Paper # DC2009-77
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Committee DC
Conference Date 2010/2/8(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Consideration of Open Faults Model Based on Digital Measurement of TEG Chip
Sub Title (in English)
Keyword(1) open faults
Keyword(2) TEG chip
Keyword(3) fault model
Keyword(4) LSI testing
1st Author's Name Toshiyuki TSUTSUMI
1st Author's Affiliation Graduate School of Science and Technology, Meiji University()
2nd Author's Name Yasuyuki KARIYA
2nd Author's Affiliation Graduate School of Science and Technology, Meiji University
3rd Author's Name Koji YAMAZAKI
3rd Author's Affiliation School of Information and Communication, Meiji University
4th Author's Name Masaki HASHIZUME
4th Author's Affiliation Institute of Technology and Science, the University of Tokushima
5th Author's Name Hiroyuki YOTSUYANAGI
5th Author's Affiliation Institute of Technology and Science, the University of Tokushima
6th Author's Name Hiroshi TAKAHASHI
6th Author's Affiliation Graduate School of Science and Engineering, Ehime University
7th Author's Name Yoshinobu HIGAMI
7th Author's Affiliation Graduate School of Science and Engineering, Ehime University
8th Author's Name Yuzo TAKAMATSU
8th Author's Affiliation Graduate School of Science and Engineering, Ehime University
Date 2010-02-15
Paper # DC2009-77
Volume (vol) vol.109
Number (no) 416
Page pp.pp.-
#Pages 6
Date of Issue