Presentation | 2010-02-15 Reduction of execution times and areas for delay measurement by subtraction Toru TANABE, Hirohisa MINATO, Kentaroh KATOH, Kazuteru NAMBA, Hideo ITO, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Since VLSI is in nanoscale size, high density and high speed in recent years, small-delay defects which change propagation time of a signal in the circuit become a serious problem. The techniques for measurement of the actual delay time of a path in the circuit are useful for detection of small-delay defects during manufacturing testing. This paper presents a method to reduce the execution times and the areas for the method of a delay measurement by using subtraction. Evaluation shows that the areas overhead and the execution times for the proposed method are about 20~35% smaller and 45~65% shorter than those for the conventional method respectively. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | VLSI / delay fault / testing / scan path / small-delay defect / measurement |
Paper # | DC2009-71 |
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Committee | DC |
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Conference Date | 2010/2/8(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Dependable Computing (DC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Reduction of execution times and areas for delay measurement by subtraction |
Sub Title (in English) | |
Keyword(1) | VLSI |
Keyword(2) | delay fault |
Keyword(3) | testing |
Keyword(4) | scan path |
Keyword(5) | small-delay defect |
Keyword(6) | measurement |
1st Author's Name | Toru TANABE |
1st Author's Affiliation | Graduate School of Advanced Integration Science, Chiba University() |
2nd Author's Name | Hirohisa MINATO |
2nd Author's Affiliation | Department of Information and Image Science, Faculty of Engineering, Chiba University |
3rd Author's Name | Kentaroh KATOH |
3rd Author's Affiliation | Graduate School of Advanced Integration Science, Chiba University |
4th Author's Name | Kazuteru NAMBA |
4th Author's Affiliation | Graduate School of Advanced Integration Science, Chiba University |
5th Author's Name | Hideo ITO |
5th Author's Affiliation | Graduate School of Advanced Integration Science, Chiba University |
Date | 2010-02-15 |
Paper # | DC2009-71 |
Volume (vol) | vol.109 |
Number (no) | 416 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |